Re: [openrisc] Re: INT and CS on OR1K was: [oc] documentation problem

["Damjan Lampret" <lampret@opencores.org>]

>
> I see this solution as the easiest to design a custom interrupt
> controller.
> But i can leave without it.
>
>
> What is the current solution?
>

You mean with vectors? There is a special vector for external interrupt
exceptions. External interrupt exception handler check which interrupt was
and transfers control to appropriate ISR. Quite similar to PowerPC.

regards, Damjan