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Re: [openrisc] Bugs detected on or1ksim



Hi,

it seems mostly everyone agrees that it should not be needed to manually
clear bit in PICSR, because they should be cleared automatically after
the interrupt is acknowledged in the interrupt source device. That is
also what I think.

However, the simulator does not follow this behaviour. I have just
downloaded last version from CVS and nothing has changed. Every device
capable of raising interrupts does this each cycle:

	(1)  Tests if conditions for interrupt raise are met
	(2a) In that case, calls report_interrupt()
	And here should be added an "ELSE" clause:
	(2b) In other case, clear PICSR bit corresponding to IRQ 	assigned to
this device.

Without (2b) clause, bits in PICSR will remain active. I sent a patch
that added this "ELSE" clause to UART and has not been committed. I can
do the dirty work and send patches for every device using interrupts
(after all, it is only a matter of "grep-ing" for report_interrupt), but
only if the patches will be committed.

Please note I do not want to start again the matter about edge- or
level-triggered interrupts. I only mean that, if the correct way of
doing it is NOT clearing bits in PICSR, then or1ksim should be patched.

Best regards,

	Carlos
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