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RE: [fpu] FPU needed




>From: owner-fpu@opencores.org [mailto:owner-fpu@opencores.org]On Behalf
>Of Damjan Lampret
>
>
>OK, I deleted last 5 or 6 emails. I got really frustrated. I have a
>chance to do silicon here at Zilog and I was really hoping FPU would be
>included. I have a simple question:
>
>- can I get at least basic FPU in verilog (I am afraid I won't have
>vhdl license for at least a month)?
>
>Who cares if it is fully IEEE-754 compliant. It can be fixed later !
>
>--damjan

OK, fine, I'll continue working on it. I just thought it would be a waste
of resources. However, I most likely won't have the chance to do a divide
block. So if Jamil could write that in Verilog, (I can do the testing, I
have a compute farm at home) it does not have to be all perfect, just do
a single precision FP divide. I will need it about two weeks before Damjan
needs everything, so I can integrate and verify.

Damjan, we need to talk about schedule. When is the actual tape out date ?
How much time do you need for integration, testing and synthesis ?
When do you need to have all blocks ?

rudi
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