RE: [fpu] multiplier (Spell Checked, Sorry)

["Rudolf Usselmann" <russelmann@hotmail.com>]

>From: owner-fpu@opencores.org [mailto:owner-fpu@opencores.org]On Behalf
>Of Jamil Khatib
>
>Hi,
>
>I made an overview of your cores it seems to me it is
>not fully IEEE-754 compliant "even violates some
>rules" they are more like generic floating point
>cores.

Now that is the dumbest statement I have read in a long time.
I don't claim that my cores are bug-free, but if you are going
to make allegations like above, you should provide detailed
explanations where and how they are not compliant or "even violates
some rules". The only point of mis compliance is the way INF and NAN
are handled (in that case are not handled) and that is clearly
described.

>You have also to know that this project should be full
>system where all cores shoul communicate on correct
>way and software should give much support for them.

I have never said or claimed that I will write a complete FPU.
I have provided a few arithmetic cores, and YOU have chosen to
add them to the FPU section of opencores. The idea was that
they could be integrated in to the FPU. I will formally request
that all my cores be moved to a different section, as I'm
tired dealing with you and your ignorance.

>For example the status flags should be controlled by
>Software. where the HW generates the exceptions and
>teh software stores teh SW flags and does not depend
>on HW ones. "this is a recommendation by IEEE-std
>because else lot of exceptions will alwys interrupt
>the system".

That's a new one. So the software will determine if there
was a DIV0, INF or NAN and then set a status flag ? That's
what you mean by "status flags should be controlled by
Software", right ?

Can you also make exact references with exact quotations,
where IEEE-754 (or whatever standard you are referring to)
makes those recommendations ?

>Please check my overview of the system block diagram
>how it looks like at BlockDiagram.eps under the FPU
>direcotry.
>
>I'll give more explaination about that diagram
>
>Note: why do you want get everything fast do we have a
>dead line or somthing?

I don't like to drag things just because there is one person
who does not understand something.

>
>Regards
>Jamil Khatib

In my 15 years of ASIC design, I have never heard so much
crap from one person. No wonder no one writes cores, everyone
is busy "specifying" them and explaining the same thing over
and over again.

rudi



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