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Re: [pci] Trying to build CRT example with webpack 5.1 and the Memec 2S200 Board [Resent]



Hello!

I don't know a lot about WebPack software, so I can't help you there.
The crt application is not VGA compatible, that is why computer will beep,
even when the card is detected.
We used special frame buffer driver for linux, to be able to display X
Windows using the card.
The thing I don't understand is why the card is not detected.
Can you run "/sbin/lspci -v" when linux boots and check if the card is
detected by linux?

Regards,
Miha Dolenc

----- Original Message -----
From: "Uwe Bonnes" <bon@elektron.ikp.physik.tu-darmstadt.de>
To: <pci@opencores.org>
Sent: Monday, January 27, 2003 3:04 PM
Subject: [pci] Trying to build CRT example with webpack 5.1 and the Memec
2S200 Board [Resent]


> [it seems my first mail didn't get asent out because of the attachments. I
> will not sent the attachments with thi message, but will send the files on
> request]
>
> Hallo,
>
> I am trying to use your PCI core. First I want to reproduce the CRT
> example. I have bought the Memec Spartan-II 2S200 PCI board and use
Webpack
> (ise-demo) 5.1 (mostly with wine under linux). I have
> - designed a plugin card with Cadsoft Eagle, using the mating connector
for
> the Memec board, containing the R2R DAC, the VGA connector and some other
> hardware for the task I want to fullfill finally
> - adapted pci/apps/crt/syn/ucf/pci_crt.ucf to the Spartan 2S200 board and
my
> plug-in layout (appended at bottom)
> - created a new directory, into which I copied the content from
> pci/rtl/verilog and pci/apps/crt/rtl/verilog (in that order, so that top.v
> and pci_user_constants.v from the pci/apps/crt/rtl/verilog directory
> overwrite those from pci/rtl/verilog)
> - created a new ise-5.1 project, into which I checked in top.v and
pci_crt.ucf
>  (crt.npl file appended at bottom)
> - run the project, created the .jed file and used impact to create a .mcs
> file
> - used naxjp to program the XC18V02 on the Memec board
>
> With an other project creating a counter for the on-board 7-segment
display,
> I verified that things are working somehow.
>
> Now I plug the Memec card with the vga plugin into a bare bone motherboard
> (CPU, Ram, PCI-VGA Card, empty AGP connector). The board boots as expected
> and the bios displays 4 PCI Ids. The same number was found before without
> the programmed memec card. Pluging in a monitor into the VGA connector of
> the Memec card plug-in, the Monitor syncs at horizontal 32 kHz and
vertical
> 62.66 Hz and reports "user mode" with the on screen menu. I routed the
Memec
> on board 24.00 MHz oszillator as VGA clock.
>
> Pluggin out the standard VGA and using only the MEMEC programmed card
> results in the Bios beeping and the monitor staying blank.
>
> I conclude:
> - the VGA implementation seems running, as the monitor syncs
> - the PCI backend doesn't run, as no PCI Id is found by the bios.
>
> Is that right?
>
> More remarks:
> - ise-5.1 doesn't meet some constraints:
> * TS_CLK_2_CRT_CLK = MAXDELAY FROM TIMEGRP  | 15.000ns   | 15.203ns   | 8
>   "CLK" TO TIMEGRP "CRT_CLK" 15 nS          |            |            |
> * COMP "trdy" OFFSET = OUT 10 nS  AFTER COM | 10.000ns   | 10.093ns   | 1
>   P "clk"                                   |            |            |
> * TIMEGRP "PCI_AD" OFFSET = OUT 11 nS  AFTE | 11.000ns   | 11.658ns   | 1
>   R COMP "clk"                              |            |            |
>
> I think these small deviations aren't something to care for. Am I wrong?
>
> - vlgincdir doesn't cope with multiple directories (Xilinx Answer Record
>   #14800), so I had to copy all sources into one directory
>
> - sometimes wine hangs when ise-5.1 starts a new process. Killing wine and
>   restarting the gui helps.
>
> - ise-5.1 shows some unknown error when it first synthesize the
>   design. Later runs work. ise-5.1 in vmware showed the same behaviour.
>
> - there are a lot of warings about redefinitions of Macros. This seems
like
>   a ISE Bug to me
>
> Requests:
> - Can anybody with a working setup for the CRT example and the 2S150 board
> rerun the project with webpack and the unmodified ucf file and report if
> things work for him?
>
>
> Thanks and sorry for the long posting
>
> --
> Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de
>
> Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
> --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
> --
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http://www.opencores.org/mailinglists.shtml


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