Re: [openrisc] First steps

["Damjan Lampret" <lampret@opencores.org>]

Michael,

if you want a quick start I recommend you take a look at one of the test
cases how they get compiled and linked. These test cases are located in
or1k/orp/orp_soc/sw/
To build them you can go to or1k/orp/orp_soc/sim/run and run '../bin/run_sw
build' and if you have or32-uclinux toolchain in your path, it should build
all test cases. To build individual test case you can then go to
or1k/orp/orp_soc/sw/<testcase> and run make there (if you don't execute
run_sw build you need to manually compile or1k/orp/orp_soc/sw/support before
you can compile individual test cases).

Once you have test cases compiled, you can run them either on simulator or
on RTL. Run either ../bin/run_sw or ../bin/run_rtl_regression. To run just
one test case, use paramater 'single <testcasenumber>'

You can have a look at orp_mon to see how to use the uart.

regards,
Damjan

PS Today I have added another test case and I have some more to add them to
the cvs. I recommend everybody watch cvs-checkins@opencores.org mailing list
to watch checkins to the cvs.

----- Original Message -----
From: "Michael McAllister" <mmcallister@annapmicro.com>
To: <openrisc@opencores.org>
Sent: Monday, April 21, 2003 6:37 AM
Subject: [openrisc] First steps


> I am working on getting the OpenRISC 1200 (ORPsoc from the Xess Xsv-800
> demo) running on a Virtex 2000E-based FPGA board.  This board also has
> SRAM & a serial port.  The hardware & firmware guys have successfully
> synthesized and place & routed the microprocessor in the Viretx FPGA
> with the UART IP Core and w/o the MMU; it's my job to get the s/w
> working.
>
> I have the ability to read & write SRAM from a host computer,
> independent of the FPGA.  My thought was to get a "hello world" kind of
> program running by loading the program into the FPGA board's SRAM,
> loading the FPGA with the OpenRISC processor, taking the processor out
> of reset, and seeing it write HELLO out to the serial port in an endless
> loop.  For this initial test, I thought it might be easier if I write
> some code that directly sets up the UART, and NOT try to get uCLinux up
> and running right away (though that is the eventual goal).
>
> I am told by the firmware guy that the UART is at address 0x90h.  I have
> recompiled the GNU tools & DDD & uCLinux & uclibc, etc, on a Linux box.
> I am wondering if I can just write a simple 'C' program:
>
> #define SERIAL_PORT_DATA    0x00000090ul   /* Serial Prot Data Register
> */
> #define SERIAL_PORT_CONTROL 0x00000093ul   /* Line Control Register
> (LCR) */
>
> int main ()
> {
>   char *pDataPort;
>   char *pControlPort;
>
>   pControlPort = SERIAL_PORT_CONTROL;
>   pDataPort    = SERIAL_PORT_DATA;
>
>   *pControlPort = 0x10; /* Set the LCR divisor latch (DL) bit */
>   *(pDataPort+2)= 0x0;
>   *(pDataPort+1)= 0x41; /* LSB of DL is set; internal counter starts */
>   *pControlPort = 0x0;  /* Clear the LCR divisor latch bit */
>
>   while (1)  {
>     *pDataPort = 'H';       /* Send hello forever */
>     *pDataPort = 'e';
>     *pDataPort = 'l';
>     *pDataPort = 'l';
>     *pDataPort = 'o';
>     *pDataPort = '\r';
>   }
>
>   return(0);
> }
>
> Load it into the SRAM, and see it start writing data to the output TX
> line?
>
> Any ideas if this will work?  What intermediary steps must be done to
> the "a.out" ELF file from gcc... is there a utility to convert it to
> plain old machine code that can be directly executed? Is there a "newbie
> FAQ"?  If not, I am volunteering to write one about my experiences.
>
>
> Sincerely,
> Michael McAllister
>
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