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[openrisc] generic flip-flop based memories.



Hi ppl.

Would there be any purpose in implementing just the
spram_64xXX memories as generic type mems? would they be slower?
spram_64x14-2x is on the right side of the limit?
I guess you always can get faster memories than generic flip-flops.. or?

A few questions about the generic multiplier..
Is the second empty stage supposed to model a two-cycle multiplier?
When inferred by a synth-util ( such as DC or BG. ) will the
the program infer a 2-stage pipelined mutiplier?.. im
really not sure about the behaviour.. i understand that
this probably differs quite a lot from util to util.. and
what "models" you have bought with them..
Also. When doing MAC. Wouldn't there be room in the second
stage for the add? Instead of doing (3-cycle? if i got it right? )
the current way..?

best regards.
/Christian M


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