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[openrisc] UART Interrupts

Hello!

I've a problem when testing a program with or1ksim. It should be generating 
serial interrupts,but it doesn't, so I would like you to clarify a couple of 
things:

First of all, I don't understand the IRQ settings in sim.cfg. OR1000 
architecture has only two interrupt lines, unless a PIC is present, so... is 
always a PIC present in simulator? In other case, which are the right values 
for this? I want tick timer on low priority line (as stated on the revised 
architecture manual) and UART on high priority one.

And second, I'm having a value of 0x0c for UART register IIR. But, according 
to my documentation, this indicates FIFOS are both disabled (bits 6 & 7 are 
equal to zero) while bit 3, that should always be 0 with FIFOS disabled, is 
1. How is this possible? Do UARTs simulated by or1ksim acurately model a real 
16450/16550?

Thank you in advance.

	Carlos Sanchez de La Lama <csanchez@teisa.unican.es>
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