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Re: [openrisc] gdb over jtag requirements?



Hi Andreas,

Andreas Rasmusson wrote:
> 
> Hi
> 
> I'm trying to run gdb over the jtag interface on an
> openrisc but have run into some difficulties.
> 
> Loading a program into ram and starting it via gdb
> works fine. However, it does not respond to when i
> press ctrl-C in gdb or if i set breakpoints.

Does your program executes correctly. There might be problem, if the
risc unintentionally access location that does not exist and it does not
get nor acknowledge nor error. In this case risc you can not stall the
risc.

> 
> Does debugging over gdb require anying particular from
> the system that is beeing debugged, e.g that certain
> interrupts are enabled? Something else?

No, everything is done for you by the gdb but, of course, if your
program changes the debug registers of the risc, then there is a
possibility that breakpoints will not work.

> 
> The processor i run on is configured to have rom from
> adresses 0x0 to 0x1000000 so i cannot set interrupthandlers
> by way of the program that i load.
> 
> Another thing, when i start the jtag-proxy 'jp1-xilinx' it
> prints some messages , e.g
> 
>  Read      npc = 08020014 ppc = 08020010 r1 = fffffffb
>  Expected  npc = 4000000c ppc = 40000024 r1 = 00000005
>  Read      npc = 00000e00 ppc = 00000e00 r1 = fffffffe
>  Expected  npc = 4000000c ppc = 40000024 r1 = 00000008
>  Read      npc = 00000e00 ppc = 00000e04 r1 = 00000001
>  Expected  npc = 40000024 ppc = 40000020 r1 = 0000000b
> 
> What are these? Should I be concerned that the read values
> differ from the Expected values?

This is a test of debug unit that is performed at the beginning. It
expects RAM to be at address 0x00. Because in your case there is flash
at 0x00, the test fails. But, to find your problem, you can change the
base address of RAM (find RAM_BASE define in jp1.c) to suit your
configuration and execute it. Then read and expected values should be
the same.

> 
> Any hints would be appreciated.
> 
> /Andreas Rasmusson, Voxi
> 
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