[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[openrisc] Re: OR1000 16 bit instruction set



Since my mails again seem to be lost without error, I'm resending...

On Thu, Feb 21, 2002 at 08:07:08AM +0100, Marko Mlinar wrote:
> > I saw a statistic for ARM somewhere, Thumb was about comparable in speed
> > (or slightly slower, not sure) to ARM on a full 32 bit architecture but
> > significantly faster on 16 bit ROM/RAM.
> That is true, however ICache should decrease this effect significally.
> ARM's Thumb itself is about 40% slower than normal ARM ISA, running
> from ICache. Still I agree it is good to make 16 bit ISA, to save some power
> on bus drivers, cache, etc.
> 
> But it is really a pain to use 16 and 32 bit ISA together...

With respect to hardware implementation, I guess?

> If we choose to implement OR16, I would suggest to use either OR16 or OR32
> in one application.

If we would never implement OR16 and OR32 on the same core this would
also change the design goal of OR16.  It wouldn't need to be designed to
be compatible with the OR32 hardware and thus not necessarily be a
subset of OR32's operations.

Which would make it a totally separate project, but still worthwile as a
control CPU (no vector and FPU options like OR32).  That's where
Altera's NIOS seems to be placed.

-- 
Andreas Bombe <bombe@informatik.tu-muenchen.de>    DSA key 0x04880A44
--
To unsubscribe from openrisc mailing list please visit http://www.opencores.org/mailinglists.shtml