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[cvs-checkins] can/ ench/verilog/can_testbench.v tl/verilog/c ...



CVSROOT:	/home/oc/cvs
Module name:	can
Changes by:	mohor	03/01/15 20:05:12

Modified files:
	bench/verilog  : can_testbench.v 
	rtl/verilog    : can_bsp.v 

Log message:
	CRC checking fixed (when bitstuff occurs at the end of a CRC sequence).

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