Re: [usb] IP Core vs. USB chip...

[Rudolf Usselmann <rudi@asics.ws>]

On Sat, 2003-08-16 at 02:47, kland@neuralog.com wrote:
> Rudi,
> 
> Thank you for the lesson.  That clears up several of my confusions.
> 
> Our case is the one you describe as wanting to fit the entire design on a 
> single FPGA. (or at least as close as we can get)
> 
> I"m inclined to go with the 1.1 all-in-the-FPGA solution for the time 
> being.  
> 
> Have you or anyone you know of ported your 1.1 USB OC to an Altera 
> Nios platform?  It would be nice to make it SOPC compliant and work 
> directly with the Avalon switching fabric.

I don't know, may be somebody on the list can help out.

> Perhaps we could do (or support) the work and donate it back to the 
> project.

Sure, that would be great ! It should if possible hock
on to the existing interface or provide an alternative
to the existing interface and keep the core back wards
compatible with existing designs.

> Ken

Regards, 
rudi               
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