RE: [fpu] FPU operations

[Damjan Lampret <damjanlampret@yahoo.com>]

> mul fp1,fp2		! floating point multiply
> cmp fp1, fp4	! compare two floating point registers
> jle xyz		! jump if larger then
> 
> Looking at your emails that keep on coming :*), I think we
> mis-communicated
> here ?
> 

No, I am just 9 hrs behind you (if you have MEST time).

> Not operands but the operations type: add, sub, mul .... sin, cos,
> tan
> Sorry I was not clear here. What I meant is that basic execution
> units
> like add, sub, mul, div, might all take 4 cycles. More complex
> execution
> units like sqrt, sin, ln etc, might take different execution times,
> that
> might vary depending on the actual operation. So, for example, a sqrt
> might take 8 cycles, a ln might take 12 cycles, etc.
> 

Sure. No problem here. I just hope fadd can take less than fmul. ;-)
Anyway forget it. You know what I mean. To have FPU as fastest as
possible.

> You don't really want to stall the CPU at any time if possible. I
> believe 
> this should be optimized by the compiler. Not optimized code
> will force the cpu to stall.
> 
> The stall logic, IMHO, should be in the CPU. I believe the CPU should
> know how long every instruction needs, and handle the stalling
> internally.
> 

It can only know if all instructions have fixed number of clk cycles to
execution. CPU can't know how many cycles it will take for fadd if once
operands are zeros and in the second case if operands are 1.234. If
execution doesn't depends what operands are then CPU knows how many clk
cycles it takes for a particular insn. Of course insns have different
number of clk cycles.

> Right, I understand this, but my point was that the register file
> should
> be located inside the CPU, not the FPU. I thought it would be easier

Sure, it is inside CPU and not FPU. FPU has interface that you last
sent.

> BTW: Please keep in mind that I'm still working on the add/sub and
> mul

I am. ;-)

--damjan



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