RE: [fpu] Add/Sub Unit Test Vectors

["Rudolf Usselmann" <rudi@inet.co.th>]

> From: owner-fpu@opencores.org [mailto:owner-fpu@opencores.org]On Behalf
> Of Jamil Khatib
> Subject: RE: [fpu] Add/Sub Unit Test Vectors 
> 
> 
> 
...
> > The C program should take the following arguments:
> > 
> > - operation type(s) any combination of
> > add,sub,mul,div
> > - suppress/generate INF
> > - suppress/generate NAN
> > - suppress generate denormalized numbers ?????
> > - perhaps others ....
> 
> I'd suggest to add an option to enter formelae in
> order to test some special equations that are known to
> give some expected results.

Tats definitely a good idea as well.

....
> 
> Sorry I meant to say to support the extended format
> not double. This is a requierment by IEEE std.
> and It is also logical to make calculations on large
> bits more than your representation, the old
> calculators for example displays10 digits but
> calculates internally upto 13 digit.
> 
> There are some reasons for that, for IEEE std this is
> needed to determine exact and inexact numbers.
> 
> >From math point of view you will have error in the
> last digit due to rounding and since your result have
> to be correct you should user higher no of digits.

Right. There is not a lot we can do in the case of add/sub
(except for saving the carry/borrow bit), but if you look
at the multiply unit I posted, you will see that the intermediate
product is 48 bits wide (operands are 24 bits wide). In the
normalization phase, I select as many valid bits as possible
for the final product, and then truncate the reminder. I will
add proper rounding at a later point.


> Regards
> Jamil Khatib 

rudi