- To: Usef Saiful-Ulum <usef@vlsi.itb.ac.id>
- Subject: Re: [fpu] Current progress
- From: Jamil Khatib <jamilkhatib75@yahoo.com>
- Date: Sun, 16 Apr 2000 12:27:07 +0200
- Organization: OpenIP Organization
- References: <Pine.LNX.3.96.1000414134418.28902A-100000@ic.vlsi.itb.ac.id>
- Reply-To: khatib@ieee.org
Usef Saiful-Ulum wrote:
> The approach used in ethernet mac team is to pick one commercially
> available NIC and start with it. What about take the same idea? using one
> of our favorite as the starting point? Of course it doesn't mean we try to
> clone something, since we'll find which is best suit for OR1k arch.
>
yes I agree withyou on that, it is a good starting point
>
> Do you have any preferences over FPUs? Should we list some FPU archs?
>
yes, currently I am reading teh i387 coprocessor and looking for information
about the i960 and powerPC if you have somthing please let me know
>
> The specs should include:
> 1. Architecture and internal organization
> 2. FP data types and format
> 3. FP insn set
> 4. FP exception condition and handling
> 5. Coprocessor interface
> 6. Added if necessary
>
> Description of each point is as follow:
> 1. * General purpose register: - FP data register
> * Special purpose register: - control register
> - status register
> - instruction pointer register
> - operand pointer register
> - opcode register
> The OR1k team has defined 16x64-bit FPR, but actually this is wrong,
> since a typical FPDR should store its values in extended-real format,
> which is 80-bit. So I recommend a 8 or 16 x 80 bit FPDR.
>
> Both kind of registers should be put on a register bank.
>
> * Instruction decoder and sequencer
> * load/store unit
> * arithmetic processing unit (add, mul, div, etc)
> * conversion unit
>
> In this point, there are major differences between architecture, POWER2 of
> PowerPC use a separate load unit, store unit and arith unit.
> Conversion unit can be used to allow concurrency of processing between
> arith operation in APU and format conversion.
>
> etc.
>
> 2. Data types/format should be support:
> * integer 8-bit, 16-bit, 32-bit or 16-bit, 32-bit, 64-bit
> * single precision real FP format
> * double precision real FP format
> * extended precision real FP format
> * packed BCD
> We should specify this for sake of clarity and avoid confusion.
>
> 3. All insn should be 32-bit width, grouped to some categories:
> * data transfer insn
> * basic arithmetic insn
> * comparison insn
> * transcendental insn
> * load constant insn
> * FPU control insn
>
> This how Pentium's FPU classified.
>
> 4. Exception
> * Branch/Set on Unordered (BSUN)
> * Signaling Not-a-Number
> * Operand Error
> * Overflow
> * Underflow
> * Div by zero
> * Inexact result
> * Inexact result on decimal input
>
> I heard that the IEEE standard defines only 5 exceptions, so we can follow
> or extends it by adding more excp.
>
> 5. Copro interface
> This is the most difficult part, since different architectures would yield
> major differences. So our common preference architecture is needed to take
> further steps.
>
>
> We can discuss all of these per point basis while collecting some FPU
> archs.
>
I attached some of the instructions, what do we need else?
>
> I have some questions regarding the development, I read on the archive
> that Long Truong has left the team so it left you and Nick Ali. Can you
> clarify this? Because on some stages, the discussion will may going on
> personal emails, at least this is what happen to OR1k team. I don't like
> the situation where only 2 or 3 people talking on the mailing list while
> it has over 30 subscribers.
>
Fo-r me I just joined the list in the time they left it and you are the first
one who talks to me now
>
> Usef
Jamil
Standard Operation:
ADD
SUB
MUL
DIV
-----------------
Memory transfer:
Load
Store
-----------------
Extra operations:
Square root
Scale
Fractional remainder
1/x
-----------------
Conversion:
Tointerger
ToReal
-----------------
Absolute
ChangeSign
getExponent
getManttesa
-----------------
Comparison:
compare
-----------------
Trigonometric
Sin
Cos
SinCos
Tan
ctan
Arcsin
arccos
arctan
-----------------
Constants:
zero
one
PI
e
log2(10)
log2(e)
log10(2)
log10(e)
loge(10)
loge(2)
INFINITY
NAN
-----------------
Log and Exp.
2^x
log2(x)
log10(x)
Loge(x)
Sinh
cosh
tanh
atanh
arccosh
arcsinh
arctanh
-----------------
Exceptions:
+-NaN
+-Infinity
Overflow
Underflow
Invalid instruction
Inexact result
-----------------
Control:
Reset core
Clear exceptions
-----------------
-----------------
-----------------