Re: [usb] UTMI Code

[Rudolf Usselmann <rudi@asics.ws>]

on 4/23/01 20:03, Steve at steve@sbulmer.com wrote:
> 
> Theres been some talk about writing the UTMI code in VHDL.
> 
> Has this gone any further?
> 
> I may not be a likely candidate to run things but I'd like to help in anyway i
> could.
> 
> Steve

Hi Steve !

I'm afraid it hasn't gone any further. My experience is that
if you need something, you need to write it yourself. I can't
even get people to help me verify the USB Function core !
Everybody want to get something for free, but nobody want's
to contribute.

The UTMI should be fairly simple. The most difficult thing is
I guess the DPLL for clock recovery/synchronization. Other than
that it's only a shifter and bit insertion/removal logic.
Oh, and you would need the actual bit clock, which may
be an input. You would have to insert a second PLL that would
generate the internal bit clock from some lower speed crystal.

All of the drivers could be modeled but must be replaced when
someone actually is going to build the UTMI in an ASIC.

The problem is there is most likely no way to build the UTMI
in an FPGA, due to the fairly high clock rate (480 Mhz for
high speed mode). On the other hand it could be tested in
Full Speed mode (12 Mhz) in an FPGA and then build in an
ASIC with high speed support ...

Cheers !
-- 
rudi