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RE: [usb] USB 2.0 core Spec. First Draft



Rudolf,

	Now I understand the intention of this "number of transaction per uframe"
register that you are targeting. I first thought that you will use this only
for control responses. And I was thinking about USB 1.1. Sorry.

If you don't see my response within 24 business hours to your email, please
email me using pteng@mail.com, pteng@yahoo.com or peter_teng@el.nec.com, or
please call me direct. Sorry in advance for the trouble that may caused you.

best regards,
"Peter" Chu Tin Teng
Computing technology I/O Group
NEC Electronics Inc.
Physical address
3301 Olcott St.,
Santa Clara, CA 95054

Mailing address
Olcott Building
2880 Scott Blvd., M/S: SC2302
P.O. Box 58062
Santa Clara, CA  95052-8062
Tel: (408)9692766
Fax: (408)9692435
Email: peter_teng@el.nec.com/pteng@mail.com


-----Original Message-----
From: Rudolf Usselmann [mailto:rudi@asics.ws]
Sent: Wednesday, January 10, 2001 9:26 PM
To: usb@opencores.org; Peter Teng
Subject: Re: [usb] USB 2.0 core Spec. First Draft


on 1/11/01 10:19, Peter Teng at peter_teng@el.nec.com wrote:

> Rudolf,
>
> I would like to make clear that "number of transaction per uframe"
register
> is not needed for PID checking. The PID checking or generation are done
> differently (see 8.6 of USB 2.0 spec for more detail).

Peter, I have read section 8.6. Please take a look at section 5.9 through
5.9.2. There it talks about high speed, high bandwidth endpoints, and PID
toggling based on how many transactions per micro frame are used.

Thanks,
rudi

> I don't understand what you meant by "I dropped the S bit as it would
> introduce to much of a latency!"
>
> If you don't see my response within 24 business hours to your email,
please
> email me using pteng@mail.com, pteng@yahoo.com or peter_teng@el.nec.com,
or
> please call me direct. Sorry in advance for the trouble that may caused
you.
>
> best regards,
> "Peter" Chu Tin Teng
> Computing technology I/O Group
> NEC Electronics Inc.
> Physical address
> 3301 Olcott St.,
> Santa Clara, CA 95054