[pci] Magic, IRSIM and other subjects

[cfk <cfk@pacbell.net>]

Gentlemen:
    I'm looking for help with a couple of ideas I'm working on. Basically,
I'm trying to figure out how to get the opencore into a IC layout so I can
understand how its done. So far, I have spent off and on over the last few
months time investigating Icarus Verilog, Magic, IRSIM, PSpice (yea, I know
that one is Windows), Electric & LASI. I can figure out how to get cells
into Magic (INV, NAND, NOR, XOR, DFF), I can interconnect them manually and
extract the simulation file that IRSIM can deal with using ext2sim, I can
admire the spice file with ext2spice. But I am stuck on two points, one I
can see some hint at the end, and the other I see a dead end looming up.

    The easy one is getting opencores to compile with Icarus Verilog. It
almost compiles, but I can see that I am missing a step where I need to take
the compilation results and combine with a library at the RTL level (where I
now have INV, NAND, NOR, XOR, DFF and such expressed). There must be a
library somewhere I havent found yet, and the knowledge to get Icarus to
compile with that library to get a netlist in RTL format. I can almost see
the path in that one.

    The hard one is getting that netlist into Magic. I havent yet found any
references on the net to the use of Magic to input a netlist. I can see how
it extracts a netlist from a layout once all the gates are connected
together, but I cannot yet see how a netlist is input with the opencore PCI
bridge into Magic itself.

    I have been successful in getting the PCI bridge into an FPGA and it
works pretty good. The next step is to understand how to design an IC. This
is really a search for knowledge as I have this burning desire to understand
how to do it, and I really dont have the means to go out and buy
Cadence/Mentor/Synopsis and my company is not quite ready to go to that
stage.  I am hoping that one or more of you might be willing to offer a few
suggestions to get me past my stuck point a bit.

Charles


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