[pci] MSI question

[suhtw@ece.gatech.edu]

Hi,

I am a grad student in Georgia Tech. While I was reading a book, PCI 
System Architecture, I came up with a question. It's about MSI
(Message Signaled Interrupt).

Book says in p255, PCI System Architecture, when the device must 
generate an interrupt request, it writes the Message Data register 
contents to the memory address specified in its Message Address 
register.

I wonder how possibly the device, I think it's one of target devices, can 
initiate a write transaction to PCI bus ?

I would appreciate it if you answer the question.
Thank you

Taeweon
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