Re: [fpu] fmul performance

[Damjan Lampret <damjanlampret@yahoo.com>]

--- Jamil Khatib <jamilkhatib75@yahoo.com> wrote:
> 
> I think the performance is some how fine.
> 
> If we split the mul operation we can not use *
> directly
> unless you followed Rudolf comments

I wasn't able yet since I don't have required tool right here. But I
might get the tools to test this. If mul stage is split then we get
better performance even w/o Synopsys's BRT tool.

> 
> One final comment: Do not you think that our core
> should be scalable? so we can increase the precision
> without much troubles?
> 

I am not expert on IEEE single/double precision. But is it enough if
all buses are expanded accordingly? If this is enough then a couple of
`defines would solve this.


regards,
Damjan


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