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RE: [openrisc] First steps



Hi.

The opencores uart16550 has internal buffer and you can write/send up to
16 bytes without waiting for the previous transmission to end.

Regards,
	Igor

> -----Original Message-----
> From: owner-openrisc@opencores.org
[mailto:owner-openrisc@opencores.org]
> On Behalf Of Jim Dempsey
> Sent: Monday, April 21, 2003 8:58 PM
> To: openrisc@opencores.org
> Subject: Re: [openrisc] First steps
> 
> You cannot output the "next" character to the UART until the UART is
ready
> to receive the next character. I am not familiar with this particular
> UART.
> Many UART designs include a holding register and a shift register.
You
> typicaly can place the next character to write into the holding
register
> while the shift register is outputing the current character. This
gives
> you
> 1 byte of buffer. The UART design usualy has one status bit for the
shift
> register busy and one status bit for the holding register ready (or
busy).
> Your code will need to test for the holding register ready/busy bit.
Look
> at
> the design to find the register offset and bit value.
> 
> >   while (1)  {
>     while((*pControlPort) & HOLDING_REGISTER_BUSY)
>         continue;
> >     *pDataPort = 'H';       /* Send hello forever */
>     while((*pControlPort) & HOLDING_REGISTER_BUSY)
>         continue;
> >     *pDataPort = 'e';
>     while((*pControlPort) & HOLDING_REGISTER_BUSY)
>         continue;
> >     *pDataPort = 'l';
>     while((*pControlPort) & HOLDING_REGISTER_BUSY)
>         continue;
> >     *pDataPort = 'l';
>     while((*pControlPort) & HOLDING_REGISTER_BUSY)
>         continue;
> >     *pDataPort = 'o';
>     while((*pControlPort) & HOLDING_REGISTER_BUSY)
>         continue;
> >     *pDataPort = '\r';
>     while((*pControlPort) & HOLDING_REGISTER_BUSY)
>         continue;
>     *pDataPort = '\n';
> >   }
> 
> Note the inclusion of LineFeed as well.
> If the Holding register flag is inverted then you must also invert the
> test.
> 
> Jim Dempsey
> 
> ----- Original Message -----
> From: "Michael McAllister" <mmcallister@annapmicro.com>
> To: <openrisc@opencores.org>
> Sent: Monday, April 21, 2003 8:37 AM
> Subject: [openrisc] First steps
> 
> 
> > I am working on getting the OpenRISC 1200 (ORPsoc from the Xess
Xsv-800
> > demo) running on a Virtex 2000E-based FPGA board.  This board also
has
> > SRAM & a serial port.  The hardware & firmware guys have
successfully
> > synthesized and place & routed the microprocessor in the Viretx FPGA
> > with the UART IP Core and w/o the MMU; it's my job to get the s/w
> > working.
> >
> > I have the ability to read & write SRAM from a host computer,
> > independent of the FPGA.  My thought was to get a "hello world" kind
of
> > program running by loading the program into the FPGA board's SRAM,
> > loading the FPGA with the OpenRISC processor, taking the processor
out
> > of reset, and seeing it write HELLO out to the serial port in an
endless
> > loop.  For this initial test, I thought it might be easier if I
write
> > some code that directly sets up the UART, and NOT try to get uCLinux
up
> > and running right away (though that is the eventual goal).
> >
> > I am told by the firmware guy that the UART is at address 0x90h.  I
have
> > recompiled the GNU tools & DDD & uCLinux & uclibc, etc, on a Linux
box.
> > I am wondering if I can just write a simple 'C' program:
> >
> > #define SERIAL_PORT_DATA    0x00000090ul   /* Serial Prot Data
Register
> > */
> > #define SERIAL_PORT_CONTROL 0x00000093ul   /* Line Control Register
> > (LCR) */
> >
> > int main ()
> > {
> >   char *pDataPort;
> >   char *pControlPort;
> >
> >   pControlPort = SERIAL_PORT_CONTROL;
> >   pDataPort    = SERIAL_PORT_DATA;
> >
> >   *pControlPort = 0x10; /* Set the LCR divisor latch (DL) bit */
> >   *(pDataPort+2)= 0x0;
> >   *(pDataPort+1)= 0x41; /* LSB of DL is set; internal counter starts
*/
> >   *pControlPort = 0x0;  /* Clear the LCR divisor latch bit */
> >
> >   while (1)  {
> >     *pDataPort = 'H';       /* Send hello forever */
> >     *pDataPort = 'e';
> >     *pDataPort = 'l';
> >     *pDataPort = 'l';
> >     *pDataPort = 'o';
> >     *pDataPort = '\r';
> >   }
> >
> >   return(0);
> > }
> >
> > Load it into the SRAM, and see it start writing data to the output
TX
> > line?
> >
> > Any ideas if this will work?  What intermediary steps must be done
to
> > the "a.out" ELF file from gcc... is there a utility to convert it to
> > plain old machine code that can be directly executed? Is there a
"newbie
> > FAQ"?  If not, I am volunteering to write one about my experiences.
> >
> >
> > Sincerely,
> > Michael McAllister
> >
> > --
> > To unsubscribe from openrisc mailing list please visit
> http://www.opencores.org/mailinglists.shtml
> 
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