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Re: [openrisc] problems with or1ksim

To: lampret@opencores.org, openrisc@opencores.org
Subject: Re: [openrisc] problems with or1ksim
From: lavender_uc@yahoo.com
Date: Thu, 21 Nov 2002 00:34:53 -0100
Reply-To: openrisc@opencores.org
Sender: owner-openrisc@opencores.org
Thank Damjan and Simon for the prompt reply. I'm very much impressed
that you always take care of our questions in such a serious manner.

Based on Simon's reply, I assume the simulation built with
or32-uclinux or or32-rtems should make no difference. Is this correct?
So what's going on with RTL regression test? The makefile uses
or32-rtems. Could I change it to or32-uclinux  and it should work
well? Thanks in advance.

nan

----- Original Message ----- 
From: "Damjan Lampret" <lampret@o... > 
To: <openrisc@o... > 
Date: Mon, 18 Nov 2002 14:00:13 +0100 
Subject: Re: [openrisc] problems with or1ksim 

> 
> 
> BTW you can go to http://www.opencores.org/projects/or1k/ATS/ and 
> see that 
> or1ksim testbench works, although I used or32-uclibc in the script 
> (or32-uclinux didn't work, will change now since it works now). You 
> can also 
> see testbench log there. 
> 
> regards, 
> Damjan 
> 
> ----- Original Message ----- 
> From: "Simon Srot" <simons@o... > 
> To: <openrisc@o... > 
> Sent: Sunday, November 17, 2002 4:09 PM 
> Subject: Re: [openrisc] problems with or1ksim 
> 
> 
> > Nan Zhou wrote: 
> > > 
> > > Hi, 
> > > 
> > > I'm back with the old question posted last month. My 
> question is how 
> > > should I build the toolchain configuring for or32-rtems? 
> Should I follow 
> > > the instuction page: 
> > > 
> http://www.opencores.org/projects/or1k/GNU%20Toolchain%20Port 
> > > and change all "or32-uclinux" to "or32-rtems"? 
> > 
> > Now the testbench is written in such way, that it can be 
> compiled with 
> > or32-uclinux targeted compiler. You can also configure the 
> testbench for 
> > or32-rtems target, but this was not tested. Testbench is meant 
> for 
> > testing the or1ksim and for that reason I don't see the need 
> for 
> > compiling it with or32-rtems. We just need the code to test 
> the or1ksim 
> > and actually and or32-rtems would produce the same code. 
> > 
> > BTW, I noticed that dhry, mycompress, basic and cbasic 
> currently are not 
> > working. I will check what is wrong someday in the near 
> future, but I 
> > know that if you checkout the revision from 16-8-2002 the all 
> tests will 
> > pass. 
> > 
> > > 
> > > But there's error when doing this. What's the directory 
> or1k/rtems and 
> > > or1k/rtems-20020807 for? Do I need it when building 
> toolchain? The 
> > > documentation is not clear to me. Thanks a lot for your 
> kindly help. 
> > 
> > These two folders contains the rtems OS code, as far as I know 
> > or1k/rtems is old version, and or1k/rtems-20020807 is the one 
> to be 
> > used. But you don't need them to run testbench. 
> > 
> > > 
> > > Sicerely, 
> > > nan 
> > > 
> > > ----- Original Message ----- 
> > > From: Marko Mlinar <markom@o... > 
> > > To: openrisc@o... 
> > > Date: Thu, 24 Oct 2002 08:01:12 +0200 
> > > Subject: Re: [openrisc] problems with or1ksim 
> > > 
> > > > 
> > > > 
> > > > I suspect you forgot to set your $PATH, since 
> testbench/configure 
> > > > did not 
> > > > detect your C compiler. The other simple problem 
> would be that you 
> > > > have 
> > > > toolchain for or32-uclinux and you are configuring 
> for or32-rtems. 
> > > > 
> > > > basic.S is source file. simulator should be executed 
> with binary 
> > > > files. 
> > > > 
> > > > Marko 
> > > > 
> > > > On Thursday 24 October 2002 01:39, Nan Zhou wrote: 
> > > > > Thanks for your prompt response, Marko and 
> Simon. I 
> > > > > went throught the whole building process of 
> toolchain 
> > > > > and or1ksim. Everything went smoothly until I 
> entered 
> > > > > or1ksim/testbench/: 
> > > > > ./configure --target=or32-rtems 
> > > > > make all 
> > > > > 
> > > > > Here's what happened: 
> > > > > 
> > > > > make[1]: Entering directory 
> > > > > 
> `/usr/home/nzhou/or1k/or1ksim/testbench/support' 
> > > > > cc -DPACKAGE=\"or1ksimtest\" -DVERSION=\"1.3\" 
> > > > > -DSTDC_HEADERS=1 -Dconst= -Dinline=  -I. -I. 
> > > > > -I../support    -Wall -g -nostdlib -mhard-div 
> -c 
> > > > > support.c 
> > > > > cc1: Invalid option `hard-div' 
> > > > > make[1]: *** [support.o] Error 1 
> > > > > make[1]: Leaving directory 
> > > > > 
> `/usr/home/nzhou/or1k/or1ksim/testbench/support' 
> > > > > make: *** [all-recursive] Error 1 
> > > > > 
> > > > > 
> > > > > Then I run ../sim -f ../sim.cfg basic.S: 
> > > > > 
> > > > > Reading script file from '../sim.cfg'... 
> > > > > Verbose on, simdebug off, interactive prompt 
> off 
> > > > > Machine initialization... 
> > > > > Clock cycle: 100ns 
> > > > > Data cache present. 
> > > > > Insn cache tag present. 
> > > > > BPB simulation off. 
> > > > > BTIC simulation off. 
> > > > > 
> > > > > Building automata... done, num uncovered: 
> 0/212. 
> > > > > Parsing operands data... done. 
> > > > > loadcode: filename basic.S  startaddr=0 
> > > > > virtphy_transl=0 
> > > > > Not COFF file format 
> > > > > Not ELF file format. 
> > > > > identifyfile2: Success 
> > > > > WARNING: dependstats stats must be enabled to 
> do 
> > > > > history analisis. 
> > > > > Resetting 1 UART(s). 
> > > > > WARNING: UART0 has problems with RX file 
> stream. 
> > > > > WARNING: Keyboard has problems with RX file 
> stream. 
> > > > > NOTE   : ata_device, using device type FILE. 
> > > > > file /tmp/sim_atadev0 already exists. Using 
> existing 
> > > > > file. 
> > > > > ata_device_debug: requested filesize was: 1 
> (MBytes). 
> > > > > ata_device_debug: actual filesize is: 1 
> (MBytes). 
> > > > > NOTE   : ata_device, using type NO_CONNECT. 
> > > > > ata_device_debug: ata_devices_hw_reset. 
> > > > > setting status register BSY 0x80 
> > > > > Resetting Tick Timer. 
> > > > > Resetting Power Management. 
> > > > > Resetting PIC. 
> > > > > Resetting memory controller. 
> > > > > Starting at 0x00000000 
> > > > > Exception 0x100 (Reset) at 0x0, EA: 0x0, ppc: 
> 0x0, 
> > > > > npc: 0x4 
> > > > > 
> > > > > 
> > > > > It stopped here. I used Ctl+C and it entered 
> prompt 
> > > > > (sim). 
> > > > > 
> > > > > I wonder what did I do wrong and how should I 
> have the 
> > > > > simulator running. By the way, there's no dhry 
> or exit 
> > > > > binary file under testbench. 
> > > > > 
> > > > > Thanks a lot. I appreciate your time and input. 
> > > > > 
> > > > > - nan 
> > > > > 
> > > > > --- Marko Mlinar <markom@o... > wrote: 
> > > > > > Hi! 
> > > > > > 
> > > > > > I was unable to reconstruct your problem, 
> I have 
> > > > > > some 
> > > > > > advices below, otherwise please send more 
> detailed 
> > > > > > bug report. 
> > > > > > 
> > > > > > > WARNING: UARTO has problems with RX 
> file stream. 
> > > > > > > 
> > > > > > > WARNING: Keyboard has problems with 
> RX file 
> > > > > > 
> > > > > > system.) 
> > > > > > It is possible that lack of uart0.rx or 
> keyboard0.rx 
> > > > > > files cause segmentation 
> > > > > > fault. Please create the files and try if 
> it helps. 
> > > > > > 
> > > > > > > The same problem happened when I ran 
> > > > > > 
> > > > > > or32-uclinux-sim from 
> > > > > > 
> > > > > > > /opt/or32-uclinux/bin/ instead with 
> inputing 
> > > > > > 
> > > > > > sim.cfg. But if sim.cfg is not 
> > > > > > 
> > > > > > > given here, I will get exception and 
> when 
> > > > > > 
> > > > > > canceling it, I can get into 
> > > > > > 
> > > > > > > simulator as (sim). 
> > > > > > 
> > > > > > Also try with sim "exit" and "dhry" 
> binary. 
> > > > > > 
> > > > > > > I got confused why the configuration 
> given in 
> > > > > > 
> > > > > > toolchains instruction page, 
> > > > > > 
> > > > > > > Architectural Simulator page, and the 
> README file 
> > > > > > 
> > > > > > are different. They are: 
> > > > > > > ./configure --target=or32-uclinux 
> > > > > > 
> > > > > > --prefix=/opt/or32-uclinux 
> > > > > > 
> > > > > > > ./configure --target=or32-rtems 
> > > > > > 
> > > > > > --prefix=/opt/or32-rtems 
> > > > > > Depends on toolchain you have. 
> > > > > > 
> > > > > > > ./configure --target=or32-uclinux 
> > > > > > > 
> > > > > > > respectively. 
> > > > > > > 
> > > > > > > I wonder if there're different 
> simulators for RTL 
> > > > > > 
> > > > > > and architecture level. 
> > > > > > 
> > > > > > > Also, the README mentions there're 
> drhy.or32 test 
> > > > > > 
> > > > > > file under testbench 
> > > > > > 
> > > > > > > directory but I can't find it. 
> > > > > > 
> > > > > > Yes, it was renamed to "dhry", but README 
> was not 
> > > > > > yet updated. 
> > > > > > 
> > > > > > hope this helps, 
> > > > > > Marko 
> > > > > 
> > > > > 
> __________________________________________________ 
> > > > > Do you Yahoo!? 
> > > > > Y! Web Hosting - Let the expert host your web 
> site 
> > > > > http://webhosting.yahoo.com/ 
> > > > 
> > > 
> > 
> > 
> 
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