Re: [openrisc] PC as GPR?

[Damjan Lampret <lampret@opencores.org>]

On 20 Feb 2002 16:31 CET you wrote:

> (List ate my email - this is a resend.)
> 
> Is there a specific reason why the PC is not addressable like a general
> purpose register (i.e. make r31 be the PC)?
> 
> Disadvantage: losing one GPR (not that painful with 32 regs).
> 
> Advantages:  Jmp becomes an alias for mov, frees one opcode.  Computable
> branch via add/sub.  PC relative addressing for load/store (no base
> register needed for position independent code).

I think this only complicate superscalar design and design of implementation where PC is hidden in the microarchitecture. Right now we had a lot of problem with PC because for sake of debugging it had to be visible to the debugger via SPR. I prefer there is no access to PC except writing it with branch/jump insns.

> 
> 
> And a wishlist item:  The architecture manual in PDF form seems not to
> be up to date wrt the Word doc, according to CVS.  Word stuff is
> unwieldy, can a current PDF be generated?

Yeah, it is old. It needs to be manually updated whenever Word file is updated. Idea is to replace Word with something that can automatically generate PDF (and HTML) on the server.

For the time being, I'll update the PDF document.

> 
> Also, did I miss something from looking over the manual or is there
> really no pre-decrement/post-increment addressing mode?  Or is the PDF
> manual really obsolete?

No, there is no post/pre addressing modes.

regards,
Damjan

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