[openrisc] Performance of OR12k

[nicholas.king@studentmail.newcastle.edu.au]

Now i am a complete newbie to hardware design :) 
CompSci Student :)
Now i was wondering about the specs for the OR12k core 
because my dream cpu is :
8 integer units (Simd) ,8 fpu units(Simd)
64kb Instruction and data cache
8 meg onchip l2 cache (Flexible)
L3 cache controller
Memory Controller :)
BusController  :) (Star Network topology Hookup dedicates cores for pci etc and more cpus) 
Now my basic premise is lots of small cpus and lots of cache on a chip so it can chew thru heaps (Simd can wait)
Now i was thinking better to use a existing core and modify it then design one from scratch :)
What do you all think?
Yours Sincerely Zeddie
PS love the web based interface to mailing lists :) I hate keeping track of threads in mail :(
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