Re: [openrisc] if you finish exams.

["Damjan Lampret" <lampret@opencores.org>]

----- Original Message -----
From: <jimmy87@sunplus.com.tw>
To: <openrisc@opencores.org>; <lampret@opencores.org>
Sent: Thursday, June 22, 2000 11:37 AM
Subject: [openrisc] if you finish exams.


>
>
> Hi Damjan,
> If you finish exams, I think all of us had better discuss OR32 and OR16

Only one more to go. Next week.

> instructions
> again.
> I feel our insns are not power enough.

Partially I agree. At the moment OR is probably too traditional.

>
> **************************************************************************
> In order to defeat some existed CPU, I think we had better had single insn
> which support push insns and pop insns from stack. The mechanism
> is used to reduce code density, power and increase performance in embedded
> usage. Only those insns may not be enough. Of course, our best advantage
> is that our ISA is free.
> **************************************************************************

Well OR32 doesn't have push/pop insns and wouldn't gain anything with them !
Load/store insns with displacement are good enough for doing stack
operations. In fact "stack" with load/store insns is more flexible since you
don't need to push/pop things to/from stack in LIFO order. Basically CISC
like stack and CISC like push/pop insns are not as powerful as RISC like
"stack" since RISC's "stack" is not even true LIFO stack.

You would probably like to introduce post-inc and pre-dec memory addressing
modes. They are good for OR16 since you don't have enough space for
embedding large displacement in insn. In case or OR32 you have enough space
for large displacements and you don't really need mentioned addressing
modes. Also in CISC machines these two modes are usually used by arithmetic
insns where one of the operands is in memory (so it is handy to travel
trough an array with actually incrementing pointer with an extra 'inc' or
'add' insn.) Conclusion: OR32 wouldn't benefit from post-inc and pre-dec
addressing modes. Probably the biggest disadvantage of post-inc and pre-dec
is additional write port on register file to keep writes in register file on
non-saturated level.

But I agree that we should make OR16 and OR32 as transparent as possible
(same addressing modes if possible).

>
> OR1601 RTL is ready. Assembler is also ready.
> But GCC is not yet ready.

I will try to finish this if nobody else is interested.

regards,
Damjan