Re: [openrisc] Context switching...

[Usef Saiful-Ulum <usef@vlsi.itb.ac.id>]

Since the context switching involving the change of processor mode (from
user mode to supervisor mode to allow the Operating System gains the
control), and since the context includes user registers, it would be
beneficial to have load/store multiple register transfer insns from/to
memory, which can be executed in privileged mode. 

So the OS can save/restore user process state easily (doesn't need to
switch back to user mode to save/restore banked user register, etc).

Q1: BTW, have you define the mechanism of processor's mode change? (e.g.
which general/special regs are banked? etc.)

Q2: What components does teh HW context consisted of? (e.g. on a VAX-11
machine, they are GPR R0-R15, program status long word, base and length
regs, stack pointers).

Thanks.

On Fri, 14 Apr 2000, Damjan Lampret wrote:

> At the moment this is the idea...
> 
> regards, Damjan
> 
> ----- Original Message ----- 
> From: Johan Rydberg <johan.rydberg@netinsight.se>
> To: <openrisc@opencores.org>
> Sent: Friday, April 14, 2000 4:28 PM
> Subject: [openrisc] Context switching...
> 
> 
> > 
> > Hi!
> > 
> > I have a small question,
> > 
> > How will the context switching be implemented?  Will the 
> > every hardware context shadow the register banks?  I.e, when
> > switching context, the register banks will switch aswell?
> > 
> > -- 
> > Johan Rydberg johan.rydberg@netinsight.net
> > Net Insight AB, Sweden direct: +46-8-685 04 17
> > http://www.netinsight.net phone:  +46-8-685 04 00
> > fax:    +46-8-685 04 20
> > 
> 

-usef-