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[ethmac] MII Management - Eth DMA




Hi all,

1. I have a problem to define clock frequency of MDC (interface
   between PHY and MIIM). I'm not sure what frequency we'll use.
   If we derive this clock from host, so we must know it.

2. In the EthDMA code which is sent by Damjan, I also don't understand the
   point of txcf signal (from tx ethmac to ethdma_tx). 

3. Where can I get the specification of bus architecture we'll use ?

Best regards,

- novan hartadi -