Re: [fpu] fdiv problem

[Jamil Khatib <jamilkhatib75@yahoo.com>]

> > what I want is a verification software at least to
> > generate the patterns, perform the operation and
> > display the results of the sofwtare and the fp
> > execution unit (may be later we can also make
> > automatic checking)
> 
> The test pattern generator generates proper floating
> point
> numbers and results. It appears that you don't
> understand how
> to integrate it into a test bench and how to write a
> test
> bench.

yes I do not know how to use it in the testbench
forgive me I am very new to verilog.


 You need to learn to look at floating point
> numbers in
> their native IEEE representation and understand what
> it all
> means.

what is the reason for that?

> 
> > Exceptions also are very important to check so
> they
> > must be predicted.
> 
> Again, you are totally clueless. Have you actually
> looked
> at the pattern generator ??? It does all of that and
> more.

Finally when I ran the program in verbose mode and
after following the code I found that you are
generating the exceptions and the results

You only provide the result from library and ignore
the native result

The code seems to generate the same test vectors again
and again for the same parameteres, why???

Do you depend on the test bench to decide if the
result of the core is correct or on the software?
 
> 
> > I need this software as soon as possible. If you
> do
> > not have time I can work on that part if no one is
> > working on it now
> 
> Yea, go ahead write your own stuff ...
> 

Since the code has most of my needs I'll not

> Are you going to have working (tested) code in a
> week so
> I can integrate it with the rest by mid September ?
> That's
> when Damjan needs the FPU for tape out.
> 

I hope so, but still I have to do rounding that you
said you are working on, I do not want to have
different results

Anyhow I give you always the status of my work but no
one give his work status, is not it a cooperative
work?

> > Anyhow I need the test bench and the pattern
> reader so
> > as to interface it to the divider.
> 
> I have emailed out some examples some time ago.
> 

Can you please be kind and resend the test bench
interface again?

> > Jamil Khatib
> 
> rudi
> 


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