RE: [fpu] FPU needed

[Damjan Lampret <damjanlampret@yahoo.com>]

OK. Great. Finally going into right direction to reach tape out and
have FPU in it. Jamil, FP div is the same as FP mul except 24x24 mul is
replaced by divider block and exponents are subtracted (instead of
added in FP mul).

I think myblock digrams (actually images from that book I mentioned a
couple of times) didn't made it to the mailing list, right? I'll resend
them again.

--damjan

--- Jamil Khatib <jamilkhatib75@yahoo.com> wrote:
> OK if that is the case I'll start working on the
> Divider and leave teh other cores, but anyhow I'll
> recode them later in VHDL.
> But since I do not know verilog I may need some time,
> do you have any resources to study verilog. I also do
> not have a compiler for it. I'll start looking for teh
> dividers on teh web and if I could not learn verilog
> fast I'll do it in VHDL and then translate it
> manually.
> 
> Regards
> Jamil KHatib
> 
> 
> --- Rudolf Usselmann <russelmann@hotmail.com> wrote:
> > 
> > >From: owner-fpu@opencores.org
> > [mailto:owner-fpu@opencores.org]On Behalf
> > >Of Damjan Lampret
> > >
> > >
> > >OK, I deleted last 5 or 6 emails. I got really
> > frustrated. I have a
> > >chance to do silicon here at Zilog and I was really
> > hoping FPU would be
> > >included. I have a simple question:
> > >
> > >- can I get at least basic FPU in verilog (I am
> > afraid I won't have
> > >vhdl license for at least a month)?
> > >
> > >Who cares if it is fully IEEE-754 compliant. It can
> > be fixed later !
> > >
> > >--damjan
> > 
> > OK, fine, I'll continue working on it. I just
> > thought it would be a waste
> > of resources. However, I most likely won't have the
> > chance to do a divide
> > block. So if Jamil could write that in Verilog, (I
> > can do the testing, I
> > have a compute farm at home) it does not have to be
> > all perfect, just do
> > a single precision FP divide. I will need it about
> > two weeks before Damjan
> > needs everything, so I can integrate and verify.
> > 
> > Damjan, we need to talk about schedule. When is the
> > actual tape out date ?
> > How much time do you need for integration, testing
> > and synthesis ?
> > When do you need to have all blocks ?
> > 
> > rudi
> >
>
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