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[ethmac] Does anyone has source code of width = 8 bit, depth= 8asyn fifo?



dear friend, I am stuck up at one place where I have to implement the 
the above said fifo.  This fifo should be implementable in ALTERA 
EPF10K100-EQ240-1 and later the same code has to be ported to actel 
FPGA.  
please send me if you one of that type of FIFO.v or FIFO.vhd
regards
ram
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