RE: [ethmac] Hardware Ping

["Kevin Kay" <kevin.kay@espipd.com>]

I have a suggestion for you.  I don't know if you're trying to do a stress
test with this ping setup or just see if the thing has basic functionality.
An easy test (in my feeble mind) would be to just do an echo.  You could set
up a data generator (a Windows machine would be quickest for me) to generate
UPD multicast packets.  You could then just loop the packet data back around
and echo it back to the data generator (note you have to regen the Ethernet
frame and put your SA in).  Using a public domain sniffer like "ethereal"
(www.ethereal.org my personal favorite, but I think he is reworking the
site, let me know if you need the program and I'll send it to you directly)
on a Windows-based machine that you could use for a data generator, you can
capture and verify both the data that you are sending and the echo data
coming from your DUT.  It should take a couple of hours to put all of the
pieces together.  I have a java-based multicast packet generator.  You need
the java runtime environment to run it, but that is also free from Sun (so
is the SDK if you want to make changes and recompile it).

I'm not sure about your design.  Do you have a processor running to set
things up, or are you simply doing a HW loopback at layer 3 (strip the
Ethernet frame off and put the IP data back into a new Ethernet frame)?
Anyway, this would probably have minimal impact on the FPGA design, and it
would still force a new FCS calculation because the SA would have to change
on the Ethernet frame.

You do not need to deal with ARPs at the MAC layer, and you really don't
need to be on the house network for your test (you probably shouldn't be,
actually).  In fact, for this test, if you isolated yourself from the house
network, you do not really need to deal with IP except for the fact that
java will not let you output raw Ethernet frames without utilizing
non-portable code.  If you have a data generator like an IXIA or a
Smartbits, then you can just burp raw Ethernet frames to your test device
and skip the process of setting up a PC to generate your data.  If you run
in full duplex mode with a commercial data generator, this would be a pretty
good stress test.  You could also do half duplex, but you would have to
adjust the data rate back or else you would never get any data through.

Just some thoughts to keep you from having to dig inside the ICMP packet.
Please excuse the poor organization of this response.  I've had several
interruptions as I was typing it.

Regards,
Kevin

-----Original Message-----
From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On
Behalf Of Nick Lindberg
Sent: Monday, November 04, 2002 6:29 PM
To: ethmac@opencores.org
Subject: [ethmac] Hardware Ping


Hello All,

I was wondering if anybody could help me out with an automatic hardware
pinger.  We have the core and everything compiled and it works, and I just
want to write a hardware standalone module to download into my FPGA to
respond to pings so we can see this thing work, which I don't think would
be too bad.  I just need to check to see if it's a ping request, then send
a ping acknowledge back to the appropriate address... all that can easily
be done in hardware... however, do I need to deal with ARP and all of that
to let the network know that I'm there, or can I just hook up a static IP
address to this things <we have one of those> and hook it up and ping it?

Thanks,
Nick


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