RE: [ethmac] RE: doubt!!

[Illan Glasner <IGlasner@mrv.com>]

   Hi,

     If you can't achive the frequancy even tho' you tried all what you can
think of, the simple solution is make your bus wider.

why two step crc etc ? simple go to the easic site geenrate the polinum for
your crc and you should get each clock a new crc for a new data you input.

you might need if you go wider to calcualte the pre load value for more
cases similar to what I wrote sometime ago for the 64 bit I was asked.

have a nice day

   Illan



-----Original Message-----
From: cntanwei@yahoo.com [mailto:cntanwei@yahoo.com]
Sent: Thursday, September 19, 2002 8:21 PM
To: ethmac@opencores.org
Subject: Re: [ethmac] RE: doubt!!


i am engaging in 10GE too!
i met a problem which you have solved successfully!

i want to calculate the 64bits wide CRC32 with altera apexII device,
but the right simulation result can't be achieved,because of multi XOR in 
one clock cycle.
so i try to use the fast CRC32 method described in R.J.glaise "fast crc 
calculation", and then use the two-step CRC32 calculation method. 
in this way, the whole CRC32 calculation can be done with a max XOR of 
4 or 5, and can be realized in the apexII device.

But the big problem is i can't get the right simulation result with the 
method described in the "fast crc calculation". am i missing something?
how about the initial value setting?

and are you using this algorism too?

could you desribe your algorism in calculating 64bits CRC32 for 10GE?

i will appreciate you very much ,if you answer it soon!!!

----- Original Message ----- 
From: "Illan Glasner" <iglasner@z... > 
To: "Muthumari S - CTD, Chennai." <muthus@c... > 
<ethmac@o... > 
Date: Fri, 8 Feb 2002 12:58:03 -0800 
Subject: [ethmac] RE: doubt!! 

> 
> 
> 
> Hi, 
> 
>    This question I was already been asked in the past and so incase 
> other looking for the same info, if you are using any interface 
> which is wider than your input data you need to preload your crc 
> machine with value differ than the all 1's. 
> 
> assumign you are working in boundary of byte than the value are : 
> 
> 8   (10011011111100011010100100001111) 
> 16  (00001001101110010011100001011001) 
> 24  (10000001011001000111010011000101) 
> 32  (01000110101011110110010001001001) 
> 40  (00110011100111111101111000101111) 
> 48  (01101000101110010011001011110101) 
> 56  (10010101010110100110000101100010) 
> 
> the above mean if the data have 8 bit less than the full input use 
> the first line if it have 16 bit less than use the seocnd line etc 
> up to 56 bit. 
> 
> BTW there is really no reason to developed crc machine it is a 
> waste of time and lot of work using excell spread sheet. simple go 
> to http://www.easics.be/webtools/crctool which put an excelent tool 
> that will generate for you the crc equation and save time. 
> 
> have a nice day 
> 
>   Illan 
> 
> 
> -----Original Message----- 
> From: Muthumari S - CTD, Chennai. [mailto:muthus@c... ] 
> Sent: Thursday, January 10, 2002 7:18 AM 
> To: Illan Glasner 
> Subject: doubt!! 
> 
> 
> 
> I developed a verilog module to calculate crc-32; 64bits (8bytes) 
> at a time. 
> As long as i have the data width of 8 bytes i don't have any 
> problem with my 
> module. I am going to use this module for 10gbps ethernet 
> application. so, 
> if the data frame length is not multiple of 8bytes; how should i 
> calculate 
> crc-32. ie., if my last 8bytes, not necessarily all the bytes are 
> valid. 
> 
> say, for example if only 3 most significant bytes are valid in my 
> last 
> 8bytes of data. How could i modify the data so as to get the crc-32 
> value 
> valid only for that 3bytes in the last 8bytes. 
> 
> For the past 1 week i have been browsing the internet to get answer 
> for 
> this, But i couldn't get anything. 
> 
> Can u give me an idea to get out of this problem????? 
> 
> 
> Thanks in advance. 
> 
> 
> Regards, 
> 
>    S.Muthumari 
>    MTS 
>    HCL Technologies Ltd., 
>    Chennai. 
>    Mail ID :  muthus@c...  
> 
>    Ph:  6230711( 4-lines )   Extn : 2539 
> "one who desires nothing for himself, is desired by all" 
> 
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