RE: [ethmac] Synthesized Netlist for ethernetMAc 10/100 code

["Igor Mohor" <igorm@opencores.org>]

Hi, 

I believe nobody did what you need so far. So you're invited to
do it.

Regards,
	Igor

> -----Original Message-----
> From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On
> Behalf Of Thoota Venkata
> Sent: 8. april 2002 15:05
> To: ethmac@opencores.org
> Subject: [ethmac] Synthesized Netlist for ethernetMAc 10/100 code
> 
> 
> Hi there,
> 
> Let me introduce myself, I am a Layout design trainee
> working on Avanti tools. I have come across your
> EthernetMac 10/100 code at opencore.org and was very
> interesting. I want to try making the layout for your
> code using avanti tools targetted to 0.25 micron
> passport library.
> 
> In this regard it would be of great help if you can
> forward the following.
> 
> 1. Synthesized gate level netlist targeted to the
> above library specified.
> 2. The timing constraint file for carrying out timing
> verification on layout.
> 
> or Please arrange to send the design constraint file
> so that I can synthesize on design compiler.
> 
> Thnaking your for providing very good core on the web.
> 
> Best Regards,
> 
> Venkata Apparao.
> 
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