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[cvs-checkins] uart16550/rtl/verilog uart_rfifo.v



CVSROOT:	/home/oc/cvs
Module name:	uart16550
Changes by:	gorban	03/07/11 17:20:50

Modified files:
	rtl/verilog    : uart_rfifo.v 

Log message:
	added clearing the receiver fifo statuses on resets

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