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[cvs-checkins] oc8051/rtl/verilog oc8051_memory_interface.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] oc8051/rtl/verilog oc8051_memory_interface.v
From: OpenCores CVS Agent <cvs@www.opencores.org>
Date: Wed, 16 Apr 2003 09:04:21 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	oc8051
Changes by:	simont	03/04/16 09:04:21

Modified files:
	rtl/verilog    : oc8051_memory_interface.v 

Log message:
	chance idat_ir to 24 bit wide

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