[cvs-checkins] mem_if/rtl/verilog mem_if_top.v mem_if_flash_if.v

[OpenCores CVS Agent <cvs@www.lampret.com>]

CVSROOT:	/home/oc/cvs
Module name:	mem_if
Changes by:	tadejm	02/11/04 16:12:59

Modified files:
	rtl/verilog    : mem_if_top.v mem_if_flash_if.v 

Log message:
	Added support for additional asynchronous memory access (sram, ...) with additional chip-select.

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