[cvs-checkins] pci/rtl/verilog pci_bridge32.v

[OpenCores CVS Agent <cvs@www.lampret.com>]

CVSROOT:	/home/oc/cvs
Module name:	pci
Changes by:	tadejm	02/10/17 21:51:51

Modified files:
	rtl/verilog    : pci_bridge32.v 

Log message:
	Changed BIST signals for RAMs.

--
To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml