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[cvs-checkins] uart16550/bench/verilog uart_test.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] uart16550/bench/verilog uart_test.v
From: OpenCores CVS Agent <cvs@www.lampret.com>
Date: Sat, 14 Sep 2002 11:39:12 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	uart16550
Changes by:	gorban	02/09/14 11:39:11

Modified files:
	bench/verilog  : uart_test.v 

Log message:
	restored include for uart_defines.v in uart_test.v

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