[cvs-checkins] vga_lcd/rtl/verilog vga_pgen.v

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	vga_lcd
Changes by:	rherveille	02/04/05 08:24:53

Modified files:
	rtl/verilog    : vga_pgen.v 

Log message:
	Fixed a potential reset bug in the hint & vint generation.

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