[cvs-checkins] pci/ ench/verilog/system.v tl/verilog/delayed_ ...

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	pci
Changes by:	mihad	02/03/05 12:53:48

Modified files:
	bench/verilog  : system.v 
	rtl/verilog    : delayed_sync.v fifo_control.v pci_target_unit.v 
	                 pci_user_constants.v pciw_pcir_fifos.v 
	                 wb_master.v 

Log message:
	Added some testcases, removed un-needed fifo signals

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