[cvs-checkins] vga_lcd/bench/verilog wb_slv_model.v tests.v t ...

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	vga_lcd
Changes by:	rherveille	02/02/07 06:38:41

Modified files:
	bench/verilog  : wb_slv_model.v tests.v test_bench_top.v 

Log message:
	Added wb_ack delay section to testbench

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