[cvs-checkins] vga_lcd/rtl/verilog vga_wb_slave.v vga_wb_mast ...

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	vga_lcd
Changes by:	rherveille	02/01/28 04:47:23

Modified files:
	rtl/verilog    : vga_wb_slave.v vga_wb_master.v vga_vtim.v 
	                 vga_top.v vga_tgen.v vga_pgen.v vga_fifo_dc.v 
	                 vga_fifo.v vga_defines.v vga_csm_pb.v 
	                 vga_colproc.v ud_cnt.v ro_cnt.v 

Log message:
	Changed counter-library.
	Changed vga-core.
	Added 32bpp mode.

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