[cvs-checkins] uart16550/rtl/verilog uart_fifo.v

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	uart16550
Changes by:	gorban	02/01/13 21:13:12

Modified files:
	rtl/verilog    : uart_fifo.v 

Log message:
	Removed confusing comment

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