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[cvs-checkins] or1k/or1ksim/testbench mc_async.c mc_sync.c mc ...



CVSROOT:	/home/oc/cvs
Module name:	or1k
Changes by:	ivang	02/01/08 16:22:38

Modified files:
	or1ksim/testbench: mc_async.c mc_sync.c mc_dram.c mc_ssram.c 
	                   mc_common.h 

Log message:
	Added GPIO output for progress indication for FPGA simulation.

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