[cvs-checkins] mem_ctrl/bench/verilog test_bench_top.v tests. ...

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	mem_ctrl
Changes by:	rudi	01/11/29 03:17:37

Modified files:
	bench/verilog  : test_bench_top.v tests.v wb_mast_model.v 
	bench/verilog/160b3ver: adv_bb.v 
	bench/verilog/sdram_models/16Mx16: mt48lc16m16a2.v 

Log message:
	- More Synthesis cleanup, mostly for speed
	- Several bug fixes
	- Changed code to avoid auto-precharge and
	burst-terminate combinations (apparently illegal ?)
	Now we will do a manual precharge ...

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