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[cvs-checkins] ethernet/rtl/verilog eth_defines.v eth_registe ...



CVSROOT:	/home/oc/cvs
Module name:	ethernet
Changes by:	mohor	01/09/24 17:02:56

Modified files:
	rtl/verilog    : eth_defines.v eth_registers.v eth_top.v 
	                 eth_wishbonedma.v 
Added files:
	rtl/verilog    : eth_sync_clk1_clk2.v 

Log message:
	Defines changed (All precede with ETH_). Small changes because some
	tools generate warnings when two operands are together. Synchronization
	between two clocks domains in eth_wishbonedma.v is changed (due to ASIC
	demands).

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