head 1.2; access; symbols rel_1_1:1.2 rel_1_0:1.2 rel_0_6_1_beta:1.2 rel_0_6__beta:1.2 rel_0_6_beta:1.2 rel_0_5_beta:1.1 rel_0_4_beta:1.1 rel_0_3_beta:1.1 rel_0_2_beta:1.1 rel_0_1_beta:1.1; locks; strict; comment @# @; 1.2 date 2005.06.11.10.08.43; author arniml; state Exp; branches; next 1.1; commitid 459c42aab8184567; 1.1 date 2004.03.23.21.31.52; author arniml; state Exp; branches; next ; desc @@ 1.2 log @introduce prefix 't48_' for all packages, entities and configurations @ text @------------------------------------------------------------------------------- -- -- $Id: dmem_ctrl_pack-p.vhd,v 1.1 2004/03/23 21:31:52 arniml Exp $ -- -- Copyright (c) 2004, Arnim Laeuger (arniml@@opencores.org) -- -- All rights reserved -- ------------------------------------------------------------------------------- package t48_dmem_ctrl_pack is ----------------------------------------------------------------------------- -- Address Type Identifier ----------------------------------------------------------------------------- type dmem_addr_ident_t is (DM_PLAIN, DM_REG, DM_STACK, DM_STACK_HIGH); end t48_dmem_ctrl_pack; ------------------------------------------------------------------------------- -- File History: -- -- $Log: dmem_ctrl_pack-p.vhd,v $ -- Revision 1.1 2004/03/23 21:31:52 arniml -- initial check-in -- ------------------------------------------------------------------------------- @ 1.1 log @initial check-in @ text @d3 1 a3 1 -- $Id: dmem_ctrl_pack-p.vhd,v 1.2 2004/03/17 22:19:59 arnim Exp $ d11 1 a11 1 package dmem_ctrl_pack is d21 1 a21 1 end dmem_ctrl_pack; d27 3 a29 1 -- $Log$ @