head 1.2; access; symbols rel_1_1:1.2 rel_1_0:1.2 rel_0_6_1_beta:1.2 rel_0_6__beta:1.2 rel_0_6_beta:1.2 rel_0_5_beta:1.1 rel_0_4_beta:1.1 rel_0_3_beta:1.1 rel_0_2_beta:1.1 rel_0_1_beta:1.1; locks; strict; comment @# @; 1.2 date 2005.06.11.10.08.43; author arniml; state Exp; branches; next 1.1; commitid 459c42aab8184567; 1.1 date 2004.03.23.21.31.52; author arniml; state Exp; branches; next ; desc @@ 1.2 log @introduce prefix 't48_' for all packages, entities and configurations @ text @------------------------------------------------------------------------------- -- -- The Conditional Branch Logic unit. -- Decisions whether to take a jump or not are made here. -- -- $Id: cond_branch-c.vhd,v 1.1 2004/03/23 21:31:52 arniml Exp $ -- -- Copyright (c) 2004, Arnim Laeuger (arniml@@opencores.org) -- -- All rights reserved -- ------------------------------------------------------------------------------- configuration t48_cond_branch_rtl_c0 of t48_cond_branch is for rtl end for; end t48_cond_branch_rtl_c0; @ 1.1 log @initial check-in @ text @d6 1 a6 1 -- $Id: cond_branch.vhd,v 1.4 2004/03/22 21:54:52 arnim Exp $ d14 1 a14 1 configuration cond_branch_rtl_c0 of cond_branch is d19 1 a19 1 end cond_branch_rtl_c0; @