head	1.1;
access;
symbols
	arelease:1.1.1.1
	avendor:1.1.1;
locks; strict;
comment	@// @;


1.1
date	2006.01.25.17.00.01;	author igorloi;	state Exp;
branches
	1.1.1.1;
next	;
commitid	327a43d7ae2b4567;

1.1.1.1
date	2006.01.31.10.55.28;	author igorloi;	state Exp;
branches;
next	;
commitid	492e43df419b4567;


desc
@@


1.1
log
@*** empty log message ***
@
text
@#include "writeback_ctrl.h"

void writeback_ctrl::do_writeback_ctrl()
{
	if((m_wb_IBUS.read() == SC_LOGIC_1)          || 
	   (m_wb_inst_addrl.read() == SC_LOGIC_1)    ||
	   (m_wb_syscall_exception.read() == SC_LOGIC_1)   ||
	   (m_wb_illegal_instruction.read() == SC_LOGIC_1) ||
	   (m_wb_ovf_excep.read() == SC_LOGIC_1) ||
	   (m_wb_DBUS.read() == SC_LOGIC_1)    ||
	   (m_wb_data_addrl.read() == SC_LOGIC_1)   ||
	   (m_wb_data_addrs.read() == SC_LOGIC_1)   ||
	   (m_wb_interrupt_signal.read() == SC_LOGIC_1))
	   wb_exception.write(SC_LOGIC_1);
	else
	   wb_exception.write(SC_LOGIC_0);
	
	
	
	
	
	
	
	
} 
@


1.1.1.1
log
@no message
@
text
@@