head 1.1; access; symbols; locks; strict; comment @# @; 1.1 date 2007.02.07.08.06.26; author jcarr; state Exp; branches; next ; commitid 39c245c988604567; desc @@ 1.1 log @initial import. This is only halfway converted from vhdl to verilog @ text @NET "DISP_LED<0>" LOC = "AB20" | IOSTANDARD = LVCMOS33 ; NET "DISP_LED<1>" LOC = "AA20" | IOSTANDARD = LVCMOS33 ; NET "DISP_LED<2>" LOC = "V18" | IOSTANDARD = LVCMOS33 ; NET "DISP_LED<3>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ; NET "DISP_LED<4>" LOC = "AB18" | IOSTANDARD = LVCMOS33 ; NET "DISP_LED<5>" LOC = "AA18" | IOSTANDARD = LVCMOS33 ; NET "DISP_LED<6>" LOC = "W18" | IOSTANDARD = LVCMOS33 ; NET "DISP_SEL<0>" LOC = "AA17" | IOSTANDARD = LVCMOS33 ; NET "DISP_SEL<1>" LOC = "U17" | IOSTANDARD = LVCMOS33 ; NET "DISP_SEL<2>" LOC = "U16" | IOSTANDARD = LVCMOS33 ; NET "DISP_SEL<3>" LOC = "U14" | IOSTANDARD = LVCMOS33 ; NET "LED_ACCESS" LOC = "AB5" | IOSTANDARD = LVCMOS33 ; NET "LED_INIT" LOC = "AA5" | IOSTANDARD = LVCMOS33 ; NET "PCI_AD<0>" LOC = "A5" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<10>" LOC = "E9" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<11>" LOC = "F11" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<12>" LOC = "E10" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<13>" LOC = "A8" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<14>" LOC = "B9" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<15>" LOC = "B10" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<16>" LOC = "F17" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<17>" LOC = "F16" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<18>" LOC = "A14" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<19>" LOC = "B14" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<1>" LOC = "B5" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<20>" LOC = "B15" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<21>" LOC = "A15" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<22>" LOC = "F12" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<23>" LOC = "F13" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<24>" LOC = "D15" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<25>" LOC = "E15" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<26>" LOC = "D17" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<27>" LOC = "C17" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<28>" LOC = "B17" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<29>" LOC = "E17" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<2>" LOC = "E6" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<30>" LOC = "A18" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<31>" LOC = "B18" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<3>" LOC = "D6" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<4>" LOC = "C6" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<5>" LOC = "B6" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<6>" LOC = "D7" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<7>" LOC = "E7" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<8>" LOC = "B8" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<9>" LOC = "F10" | IOSTANDARD = PCI33_3 ; NET "PCI_CBE<0>" LOC = "F9" | IOSTANDARD = PCI33_3 ; NET "PCI_CBE<1>" LOC = "C10" | IOSTANDARD = PCI33_3 ; NET "PCI_CBE<2>" LOC = "D13" | IOSTANDARD = PCI33_3 ; NET "PCI_CBE<3>" LOC = "E13" | IOSTANDARD = PCI33_3 ; NET "PCI_CLK" LOC = "A11" | IOSTANDARD = PCI33_3 ; NET "PCI_IDSEL" LOC = "D14" | IOSTANDARD = PCI33_3 ; NET "PCI_nDEVSEL" LOC = "E12" | IOSTANDARD = PCI33_3 ; NET "PCI_nFRAME" LOC = "C13" | IOSTANDARD = PCI33_3 ; NET "PCI_nINT" LOC = "B19" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_nIRDY" LOC = "A13" | IOSTANDARD = PCI33_3 ; NET "PCI_nPERR" LOC = "D12" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_nRES" LOC = "A19" | IOSTANDARD = PCI33_3 ; NET "PCI_nSERR" LOC = "B12" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_nSTOP" LOC = "A12" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_nTRDY" LOC = "B13" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_PAR" LOC = "A9" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "LED_ALIVE" LOC = "AB4" | IOSTANDARD = LVCMOS33 ; NET "mclk" LOC = "E22"; NET "red" LOC = "E21"; NET "grn" LOC = "F21"; NET "blu" LOC = "F20"; NET "hs" LOC = "F19"; NET "vs" LOC = "G19"; @